7.0 CIRCUITS FOR THE ARITHMETICAL OPERATIONS +, ×

7.0 用于+, ×算术运算的电路 #

7.1 #

For the device — and in particular for CA — a real number is a sequence of binary digits. We saw in 5.3, that a standard of 27 binary digit numbers corresponds to the convention of carrying 8 significant decimal digits, and is therefore satisfactory for many problems. We are not yet prepared to make a decision on this point (cf. however, {12.2}), but we will assume for the time being, that the standard number has about 30 digits.

When an arithmetical operation is to be performed on such numbers they must be present in some form in the device, and more particularly in CA. Each (binary) digit is obviously representable by a stimulus at a certain point and time in the device, or, more precisely, the value 1 for that digit can be represented by the presence and the value 0 by the absence of that stimulus. Now the question arises, how the 30 (binary) digits of a real number are to be represented together. They could be represented simultaneously by 30 (possible) stimuli at 30 different positions in CA, or all 30 digits of one number could be represented by (possible) stimuli at the same point, occurring during 30 successive periods τ in time.

Following the principle of 5.6 — to place multiple events in temporal succession rather than in (simultaneous) spatial juxtaposition — we choose the latter alternative. Hence a number is represented by a line, which emits during 30 successive periods τ the stimuli corresponding to its 30 (binary) digits.

7.2 #

In the following discussions we will draw various networks of E-elements, to perform various functions. These drawings will also be used to define block symbols. That is, after exhibiting the structure of a particular network, a block symbol will be assigned to it, which will represent it in all its further applications — including those where it enters as a constituent into a higher order network and its block symbol. A block symbol shows all input and output lines of its network, but not their internal connections. The input lines will be marked ⊃−− and the output lines −−•. A block symbol carries the abbreviated name of its network (or its function), and the number of E-elements in it as an index to the name. Cf. e.g. Figure 3 below.

figure3

7.3 #

We proceed to describe an adder network: Figure 3. The two addends come in on the input lines a’, a’’, and the sum is emitted with a delay 2τ against the addend inputs on the output line s. (The dotted extra input line c is for a special purpose which will appear in 8.2) The carry digit is formed by ② . The corresponding digits of the two addends together with the preceding carry digit (delay τ!) excite each one of ◯ (left), ② , ③ and an output stimulus (that is a sum digit 1) results only when ◯ is excited without ② , or when ③ is excited — that is when the number of 1’s among the three digits mentioned is odd. The carry stimulus (that is a carry digit 1) results, as pointed out above, only when ② is excited — that is when there are at least two 1’s among the three digits mentioned. All this constitutes clearly a correct procedure of binary addition.

In the above we have made no provisions for handling the sign of a number, nor for the positioning of its binary point ( the analog of the decimal point ). These concepts will be taken up in {8.0}, but before considering them we will carry out a preliminary discussion of the multiplier and the divider.

7.4 #

A multiplier network differs qualitatively from the adder in this respect: In addition every digit of each addend is used only once, in multiplication each digit of the multiplicand is used an many times as there are digits in the multiplier. Hence, the principle of 5.6 (cf. also the end of 7.1) requires that both factors be remembered by the multiplier network for a (relatively) considerable time: Since each number has 30 digits, the duration of the multiplication requires remembering for at least 30^2 = 900 periods τ . In other words: It is no longer possible, as in the adder, to feed in the two factors on two input lines, and to extract in continuous operation the product on the output line — the multiplier needs a memory (cf. 2.4 (a)).

In discussing this memory we need not bring in M—this is a relatively small memory capacity required for immediate use in CA, and it is best considered in CA.

figure4

7.5 #

The E-elements can be used as memory devices: An element which stimulates itself, inline-1 , will hold a stimulus indefinitely. Provided with two input lines rs, cs for receiving and for clearing (forgetting) this stimulus, and with an output line os to signalize the presence of the stimulus (during the time interval over which it is remembered), it becomes the network of Figure 4.

It should be noted that this \(\boxed{m1}\) corresponds to the actual vacuum tube trigger circuits mentioned at the beginning of 5.1. It is worth mentioning that \(\boxed{m1}\) contains one E-element, while the simplest trigger circuits contain one or two vacuum tubes (cf. loc. cit.), in agreement with the estimates of 6.5.

figure5

Another observation is that \(\boxed{m1}\) remembers only one stimulus, that is one binary digit. If k-fold memory capacity is wanted, then k blocks \(\boxed{m_1}\) are required, or a cyclical arrangement of k E-elements: inline-2. This cycle can be provided with inputs and outputs in various ways, which can be arranged so that whenever a new stimulus (or rather the fact of its presence or absence, that is a binary digit) is received for remembering — say at the left end of the cycle—the old stimulus which should take its place—coming from the right end of the cycle—is automatically cleared. Instead of going into these details, however, we prefer to keep the cycle open: −−◯→−◯→− …→−◯→− and provide it with such terminal equipment (at both ends, possibly connecting them) as may be required in each particular case. This simple line is shown again in Figure 5. Terminal equipment, which will normally cycle the output os at \(\boxed{l_k}\) ’s right end back into the input at its left end, but upon stimulation at s suppress (clear) this returning of the output os and connect instead the input with the line rs, is shown in Figure 6.

figure6

7.6 #

\(\boxed{l_k}\) , with the terminal equipment of Figure 6, is a perfect memory organ, but without it, in the form of Figure 5, it is simply a delay organ. Indeed, its sole function is to retain any stimulus for k periods t and then re-emit it and to be able to do this for successive stimuli without any interference between them.

This being so, and remembering that each E-element represents (one or two) vacuum tubes, it would seem wasteful to use k–2k vacuum tubes to achieve nothing more than a delay kt. There exist delay devices which can do this (in our present situation t is about a microsecond and k is about 30) more simply. We do not discuss them here, but merely observe that there are several possible arrangements (cf. 12.5). Accordingly, we replace the block \(\boxed{l_k}\) of Figure 5 by a new block \(\boxed{dl(k)}\) , which is to represent such a device. It contains no E-element, and will itself be treated as a new element.

We observe, that if is a linear delay circuit, stimuli can backtrack through it (cf. the end of 6.4). To prevent this, it suffices to protect its ends by E-elements, that is to achieve the first and the last t delay by −−◯→− or to use it in some combination like Figure 6, where the E-elements of the associated network provide this protection.

7.7 #

We can now describe a multiplier network. Binary multiplication consists of this: For each digital position in the multiplier (going from left to right), the multiplicand is shifted by one position to the right, and then it is or is not added to the sum of partial products already formed, according to whether the multiplier digit under consideration is 1 or 0.

figure7

Consequently the multiplier must contain an auxiliary network, which will or will not pass the multiplicand into the adder, according to whether the multiplier digit in question is 1 or 0. This can be achieved in two steps: First, a network is required, which will emit stimuli during a certain interval of τ periods (the interval in which the multiplicand is wanted), provided that a certain input (connected to the organ which contains the multiplier) was stimulated at a certain earlier moment (when the proper multiplier digit is emitted). Such a network will be called a discriminator. Second, a valve is required which will pass a stimulus only if it is also stimulated on a second input it possesses. These two blocks together solve our problem: The discriminator must be properly controlled, its output connected to the second input of the valve, and the multiplicand routed through the valve into the adder. The valve is quite simple: Figure 7. The main stimulus is passed from is to os, the second input enters at s.

figure8

A discriminator is shown in Figure 8. A stimulus at the input t defines the moment at which the stimulus, which determines whether the later emission (at os) shall take place at all, must be received at the inputs. If these two stimuli coincide, the left ② is excited. Considering its feedback, it will remain excited until it succeeds in stimulating the middle ② . The middle ② is connected to Ⓧis in such a manner that it can be excited by the left ② only at a moment at which Ⓧis is stimulated, but at whose predecessor Ⓧis was not stimulated—that is at the beginning of a sequence of stimuli at Ⓧis . The middle ② then quenches the left ② , and together with Ⓧis excites the right ② . The middle ② now becomes and stays quiescent until the end of this sequence of stimuli at Ⓧis and beyond this, until the beginning of the next sequence. Hence the left ② is isolated from the two other ② , and thereby is ready to register the s, t stimuli for the next Ⓧis sequence. On the other hand the feedback of the right ② is such that it will stay excited for the duration of this Ⓧis sequence, and emit stimuli at os. There is clearly a delay 2t between the input at Ⓧis and the output at os.

Now the multiplier network can be put together: Figure 9.The multiplicand circulates through \(\boxed{dl Ⅰ}\) , the multiplier through \(\boxed{dl Ⅱ}\) and the sum of partial products (which begins with the value 0 and is gradually built up to the complete product) through \(\boxed{dl Ⅲ}\) . The two inputs t, t’ receive the timing stimuli required by the discriminator (they correspond to t, is in Figure 8.)

figure9

7.8 #

The analysis of 7.7 avoided the following essential features of the multiplier: (a) The timing network which controls the inputs t, t’ and stimulates them at the proper moments. It will clearly have to contain, \(\boxed{dl}\) and the sum of partial products (which begins with the value -like elements (cf. {}). (b) The k (delay lengths) of the \(\boxed{dl Ⅰ}\) \(\boxed{dl Ⅲ}\) . These too have certain functions of synchronization: Each time when the adder functions (that is in each interval it–f t) the multiplicand and the partial product sum (that is the outputs of \(\boxed{dl Ⅰ}\) and \(\boxed{dl Ⅲ}\) of ) must be brought together in such a manner that the former is advanced by t (moved by one position to the right) relatively to the latter, in comparison with their preceding encounter.

Also, if the two factors have 30 digits each, the product has 60 digits. Hence \(\boxed{dl Ⅲ}\) should have about twice the k of \(\boxed{dl Ⅰ}\) and \(\boxed{dl Ⅱ}\) , and a cycle in the former must correspond to about two cycles in the latter. (The timing stimuli on t will be best regulated in phase with \(\boxed{dl Ⅱ}\) .) On the other hand, it is advisable to make provisions for rounding the product off to the standard number of digits, and thereby keep the k of \(\boxed{dl Ⅲ}\) multiplicand and the multiplier into near 30. (c) The networks required to get the multiplicand and the multiplier into \(\boxed{dl Ⅰ}\) and \(\boxed{dl Ⅱ}\) (from other parts of the device), and to get the product out of \(\boxed{dl Ⅲ}\) . (d) The networks required to handle the signs and the binary point positions of the factors. They are obviously dependent upon the way in which these attributes are to be dealt with arithmetically (cf. the end of 7.3 and {}).

All these points will be dealt with subsequently. The questions connected with (d) — arithmetical treatment of sign and binary point—must be taken up first, since the former is needed for subtraction, and hence for division too, and the latter is important for both multiplication and division.