13.0 ORGANIZATION OF M #

13.1 #

We return to the discussion of a delay memory based on the analysis and the conclusions of 12.6 and 12.7. It is best to start by considering Figure 19 again, and the alternatives which it exhibits.

We know from 12.7 that we must think in terms of 256 = 28 organs , of capacity 1, 024 = 210 each. For a while it will not be necessary to decide which of the two alternatives, Figure 19 (a) or (b), (or which combination of both) will be used. (For the decision cf. {}.) Consequently we can replace Figure 19 by the simpler Figure 18. The next task is, then, to discuss the terminal organs A and SG. A is a 4 stage amplifier, about which more was said in 12.5. The function of A is solely to restore the pulse emerging from to the shape and intensity with which it originally entered . Hence it should really be considered a part of proper, and there is no occasion to analyze it in terms of E-elements. SG, on the other hand, is a switching and gating organ and we should build it up from E-elements. We therefore proceed to do this.

13.2 #

The purpose of SG is this: At those moments (i.e. periods τ ) when other parts of the device (i.e. CC, CA and perhaps I, O) are to send information into the to which this SG is attached, or when they are to receive information from it, SG must establish the necessary connections—at such moments we say that SG is on. At those moments when neither of these things is required,

SG must route the output of its

back into the input of its (or its other)

, according

to the approximate alternative of Figure 19—at such moments we say that SG is off. In order to achieve this it is clearly necessary to take two lines from C (and I, O) to this SG: One to carry the output to C, and one to bring the input from C. Since at any given time (i.e. period τ ) only one SG will be called upon for these connections with C, i.e. be on (remember the principle of 5.6!) there need only be one such pair of connecting lines, which will do for all 256 SG’s. We denote these two lines by Lo and Li, respectively. Now the scheme of Figure 18 can be made more detailed, as shown in Figure 20.

As indicated, Lo is the line connecting the outputs of all SG’s to C and Li is the line connecting C to the inputs of all SG’s. When SG is off, its connections o, i with Lo, Li are interrupted, its output goes to a, this being permanently connected to the input c of the proper , according to Figure 19 (a) or (b). When SG is on, its connections with a are interrupted, its output goes through o to Lo and so to C, while the pulses coming from C over Li go into i which is now connected with a, so that these stimuli get now to a and from there to the proper input (cf. above). The line s carries the stimuli which put SG on or off—clearly each SG must have its individual connection s (while Lo, Li are common.)

13.3 #

Before we consider the E-network of SG, one more point must be discussed. We allowed for only one state when SG is on, whereas there are actually two: First, when SG forwards information from M to C; second, when SG forwards information from C to M. In the first case the output of SG should be routed into Lo, and also into a, while no Li connection is wanted. In the second case Li should be connected to a (and hence to the proper input by the corresponding permanent connection of a). This information takes the place of the information already in M, which would have normally gone there (i.e. the output of SG which would have gone to a if SG had remained off), hence the output of SG should go nowhere, i.e. no Lo connection is wanted. (This is the process of clearing. For this treatment of clearing cf. {}) To sum up: Our single arrangement for the on state differs from what is needed in either of these two cases. First case: a should be connected to the output of SG, and not to Li. Second case: a should lead nowhere, not to Lo. Both maladjustments are easily corrected. In the first case it suffices to connect Lo not only to the organ of C which is to receive its information, but also to Li—in this manner the output of SG gets to a via Lo, the connection of Lo with Li. In the second case it suffices to connect Lo to nothing (except its i’s)—in this manner the output of a goes into Lo, but then nowhere. In this way the two above supplementary connections of Lo and Li convert the originally unique on state of SG to be the first or the second case described above. Since only one SG is on at any one time (cf. 13.2) these supplementary connections are needed only once. Accordingly we place them into C, more specifically into CC, where they clearly belong. If we had allowed for two different on states of SG itself, then it would have been necessary to locate the E-network, which establishes the two corresponding systems of connections, into SG. Since there are 256 SG’s and only one CC, it is clear that our present arrangement saves much equipment.

13.4 #

We can now draw the E-network of SG, and also the E-network in CC which establishes the supplementary connections of Lo and Li discussed in 13.3.

Actually SG will have to be redrawn later (cf. {}), we now give its preliminary form: SGj in Figure 21. When s is not stimulated the two Ⓧ2 are impassable to stimuli, while Ⓧ is, hence a stimulus en- tering at b goes on to a, while o and i are disconnected from b and a. When s is stimulated the two Ⓧ2 become passable, while Ⓧ is blocked, hence b is now con- nected to o and i to a. Hence SGj is on in the sense of 13.2 while s is stimulated, and it is off at all other times. The triple delay on Ⓧ is necessary for this reason: When SGj is on, a stimulus needs one period τ to get from b to o, i.e. to Lo (cf. 13.3 and the end of this Section 13.4), and one to get from Li, i.e. from i (cf. Figure 20) to a—that is, it takes 3τ from b to a. It is desirable that the timing should be the same when SGj is off, i.e. when the stimulus goes via Ⓧ from b to a—hence a triple delay is needed on Ⓧ. The supplementary connections of Lo and Li are given in Figure 22. When r is not stimulated the two Ⓧ are pass- able to stimuli; while Ⓧ2 is not, hence a stimulus entering at Lo is fed back into Li and appears also at Ci, which is sup- posed to lead to C. When r is stimulated the two Ⓧ are blocked, while Ⓧ2 becomes passable, hence a stimulus entering at Co, which is supposed to come from C, goes on to Li, and Lo is isolated from all con- nections. Hence SCL3 produces the first state of 13.3 when r is not stimulated, and the second state when r is stimulated. We also note that in the first case a stimulus passes from Lo to Li with a delay τ (cf. the timing question of SGj, discussed above).

13.5 #

We must next give our attention to the line s of Figure 20 and 21: As we saw in the first part of 13.4, it is the stimulation of s which turns SG on. Hence, as was emphasized at the end of 13.2, each SG must have its own s—i.e. there must be 256 such lines s. Turning a desired SG on, then, amounts to stimulating its s. Hence it is at this point that the ≈ 250-way—precisely 256-way—switching problem commented upon in 12.7 presents itself. More precisely: It is to be expected that the order to turn on a certain SG—say No. K—will appear on two lines in CC reserved for this purpose in this manner: One stimulus on the first line expresses the presence of the order as such, while a sequence of stimuli on the second line specifies the number k desired. k runs over 256 values, it is best to choose these as 0, 1,…, 255, in which case k is the general 8-digit binary integer. Then k will be represented by a sequence of 8 (possible) stimuli on the second line, which express (by their presence or absence), in their temporal succession, k’s binary digits (1 or 0) from right to left. The stimulus expressing the order as such must appear on the first line (cf. above) in some definite time relation to these stimuli on the second line—as will be seen in {}, it comes immediately after the last digit. Before going on, we note the difference between these 8 (binary) digit integers k and the 30 (binary) digit real numbers (lying between 0 and 1, or, with sign, between −1 and 1), the standard real numbers of 12.2. That we consider the former as integers, i.e. with the binary point at the right of the 8 digits, while in the latter the binary point is assumed to be to the left of the 30 digits, is mainly a matter of interpretation (cf. {}). Their difference in lengths, however, is material: A

standard real number constitutes the entire content of a 32 unit minor cycle, while an 8 digit k is only part of an order which makes up such a minor cycle. (cf. {}.)